Vera Nand

Revision as of 10:24, 28 February 2013

The Vera units can have 8/16/32 MB of NAND memory as it can be seen in the Vera comparison table (1). Below you can read more about how the NAND memory works.

Information about NAND

NAND flash architecture was introduced by Toshiba in 1989. These memories are accessed much like block devices, such as hard disks or memory cards. Each block consists of a number of pages. The pages are typically 512 or 2,048 or 4,096 bytes in size. Associated with each page are a few bytes (typically 1/32 of the data size) that can be used for storage of an error correcting code (ECC) checksum.

Typical block sizes include:

• 32 pages of 512+16 bytes each for a block size of 16 KB
• 64 pages of 2,048+64 bytes each for a block size of 128 KB
• 64 pages of 4,096+128 bytes each for a block size of 256 KB
• 128 pages of 4,096+128 bytes each for a block size of 512 KB.

While reading and programming is performed on a page basis, erasure can only be performed on a block basis. Number of Operations (NOPs) is the number of times the pages can be programmed. So far, this number for MLC flash is always one while, for SLC flash, it is four.

NAND devices also require bad block management by the device driver software, or by a separate controller chip. When a logical block is accessed by high-level software, it is mapped to a physical block by the device driver or controller. A number of blocks on the flash chip may be set aside for storing mapping tables to deal with bad blocks, or the system may simply check each block at power-up to create a bad block map in RAM. The overall memory capacity gradually shrinks as more blocks are marked as bad.

NAND relies on ECC to compensate for bits that may spontaneously fail during normal device operation. A typical ECC will correct a one-bit error in each 2048 bits (256 bytes) using 22 bits of ECC code, or a one-bit error in each 4096 bits (512 bytes) using 24 bits of ECC code. If the ECC cannot correct the error during read, it may still detect the error. When doing erase or program operations, the device can detect blocks that fail to program or erase and mark them bad. The data is then written to a different, good block, and the bad block map is updated.

Most NAND devices are shipped from the factory with some bad blocks. These are typically marked according to a specified bad block marking strategy.

FAQ

1. What is be the maximum number of bad blocks admissible for the Vera units ?

If a block (512 byte unit) turns to be bad, the JFFS2 driver will skip the whole erease block (16KiB). The number of the admissible blocks depends on the size of the partition where the bad blocks are appearing.
A level of 10% of the total blocks available should not cause problems.

2. How much memory in bytes/kilobytes does a bad block take from the flash ?

One block consumes only 512 byte of memory, but the whole erase block (16KiB) will be unusable.

3. Will 200-300 bad blocks affect anything else except the size of the flash ?

If a block becomes bad during writing a new firmware, that will be detected by he nandwrite utility, and it will write the actual data into the next good block, so these bad block will not cause problems.

If a block becomes bad when the JFFS2 driver writes out some data into the flash, that will be detected by the JFFS2, and it will write the data into another block.

If a block becomes bad in the squashfs partition, that can cause a kernel panic.

If a block becomes bad in the u-boot partition, the unit will not boot anymore.